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Clock path technique for using on-chip circuitry to generate a correct encode pattern to test the on-chip circuitry
Clock path technique for using on-chip circuitry to generate a correct encode pattern to test the on-chip circuitry
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机译:时钟路径技术,用于使用片上电路生成正确的编码模式以测试片上电路
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摘要
Aspects include techniques for implementing a clock path technique for using on-chip circuitry to generate a correct encode pattern to test the on-chip circuitry for encoding and correction of a chip. A computer-implemented method may include initializing a scan of the chip including data and a set of check bits protecting the data; applying a global control bit to a latch on the chip; and applying an additional clock to the latch so the check bits are updated using the on-chip circuitry.
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