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Image processing apparatus, method for controlling same, and storage medium for improving a processing efficiency in an image processing apparatus which includes a multi-core processor

机译:图像处理设备,用于控制该图像处理设备的方法以及用于提高包括多核处理器的图像处理设备中的处理效率的存储介质

摘要

A scheduler of an image processing apparatus allocates processing of control programs of the image processing apparatus to a plurality of cores when it is determined that a processor is mounted to a peripheral unit. The scheduler allocates a control program of the peripheral unit and a program related to a control program for the peripheral unit among the control programs of the image processing apparatus to at least one core among the plurality of cores and allocates remaining control programs among the control programs of the image processing apparatus to remaining cores among the plurality of cores when it is determined that a processor is not mounted to the peripheral unit.
机译:当确定处理器安装到外围单元时,图像处理设备的调度器将图像处理设备的控制程序的处理分配给多个核。调度器将图像处理设备的控制程序之中的外围单元的控制程序和与外围单元的控制程序有关的程序分配给多个核中的至少一个核,并且在控制程序之中分配剩余的控制程序。当确定处理器未安装到外围单元时,将图像处理设备的“剩余部分”保留给多个核中的其余核。

著录项

  • 公开/公告号US9854129B2

    专利类型

  • 公开/公告日2017-12-26

    原文格式PDF

  • 申请/专利权人 KONICA MINOLTA INC.;

    申请/专利号US201514953118

  • 发明设计人 KAZUTO TANAKA;MINORU YAGUCHI;

    申请日2015-11-27

  • 分类号H04N1/32;G06T1/20;H04N1;

  • 国家 US

  • 入库时间 2022-08-21 12:56:05

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