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Clock-domain-crossing specific design mutations to model silicon behavior and measure verification robustness
Clock-domain-crossing specific design mutations to model silicon behavior and measure verification robustness
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机译:跨时钟域的特定设计突变,可对硅的行为进行建模并衡量验证的可靠性
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摘要
Methods and apparatuses related to clock-domain-crossing (CDC) specific design mutations to model silicon behavior and measure verification robustness are described. CDC signal paths can be identified in a circuit design. Next, synchronization circuitry associated with the CDC signal paths can be identified. Design mutations can be added to the identified synchronization circuitry. The design mutations can then be used during functional verification to measure verification robustness of a circuit verification test suite.
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