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Hybrid LPDDR4-DRAM with cached NVM and flash-nand in multi-chip packages for mobile devices
Hybrid LPDDR4-DRAM with cached NVM and flash-nand in multi-chip packages for mobile devices
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机译:混合LPDDR4-DRAM,具有用于移动设备的多芯片封装的缓存NVM和闪存nand
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摘要
An apparatus comprises a hybrid-memory multi-chip package (MCP) including a non-volatile memory (NVM) in an NVM die; a dynamic random access memory (DRAM) in two or more DRAM die, wherein a portion of the DRAM is allocated as a cache memory for the NVM; and a hybrid controller for the NVM and DRAM. The hybrid controller includes an NVM interface to the NVM; a DRAM interface to the cache memory; a host interface to communicate data with a host processor, wherein the host interface includes a parallel data bus for reading and writing data directly with both of the DRAM and the NVM; and logic circuitry configured to interleave access by the host processor and hybrid controller to the DRAM and NVM.
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