Reference-less Low Power Pulse Width Modulation Data Recovery Circuit using Time Comparison Delay Line and Recovery Method thereof

摘要

Disclosed are a reference-less low power pulse width modulation (PWM) data recovery circuit using a time comparison delay line and a recovery method thereof. The low power PWM data recovery circuit using the time comparison delay line according to an embodiment of the present invention comprises: a first time comparison delay line to which PWM data is applied and which is connected to a plurality of buffers having the same delay; a second time comparison delay line which is connected in parallel to the first time comparison delay line, to which the PWM data is applied and which is connected to a plurality of buffers having the same delay; and a switch control unit alternately driving the first time comparison delay line and the second time comparison delay line. The present invention can recover the PWM data input by using values output through the first time comparison delay line and the second time comparison delay line.