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A technique for reducing plasma induced etch damage during the fabrication of vias in interlayer dielectrics
A technique for reducing plasma induced etch damage during the fabrication of vias in interlayer dielectrics
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机译:减少层间电介质中通孔制造过程中等离子体引起的蚀刻损伤的技术
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摘要
A method comprising: forming a first conductive charge balance layer (211, 211a) over a dielectric layer (206) of a metallization structure (212) of a microstructure device (200), the first charge balance layer (211, 211a) connecting laterally adjacent regions of the dielectric layer (206) and wherein each of the regions receives an opening therein for receiving a conductive material therein, the first conductive charge balance layer (211, 211a) comprising a conductive polymer material; Forming an antireflective coating (207) over the first conductive charge balance layer (211, 211a); and performing a plasma enhanced etching process to form the openings using the first conductive charge balance layer (211, 211a).
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