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A high frequency - the same clock suppression art for large dynamic common-mode signals
A high frequency - the same clock suppression art for large dynamic common-mode signals
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机译:高频-大型动态共模信号的相同时钟抑制技术
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摘要
High frequency - the same clock suppression circuit for large dynamic common-mode signals, comprising:a sensing resistor in series with a load is configured;a summing amplifier, which is configured for the detection of current through the sensing resistor, wherein an output of the summing amplifier has the dynamic common-mode signals;a low-pass filter between the sensing resistor and the summing amplifier; anda high voltage (hv) - inverter, wherein a supply voltage 8v or can be higher, and wherein the input of the hv - inverter with the sensing resistor on one side of the said detecting resistor is connected with respect to the load, and wherein the output of the hv - inverter is connected by means of the low-pass filter;with the common-mode signals independently of a pulse width modulation frequency or depth of modulation are.
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