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Apparatus and method for ensuring reliability of protection trip of intelligent substation

机译:确保智能变电站保护跳闸可靠性的装置和方法

摘要

An apparatus and method for ensuring the reliability of a trip protection of an intelligent substation. The apparatus comprises a main CPU and an auxiliary CPU connected together, and a main FPGA and an auxiliary FPGA connected together. The main FPGA and the auxiliary FPGA are connected to a physical layer of a protection apparatus, and the main CPU and the auxiliary CPU are connected to a state monitoring data output end of a protected device. The main CPU sends a processing result to the main FPGA, the auxiliary CPU sends the processing result to the auxiliary FPGA, and the auxiliary FPGA synchronizes current information with the main FPGA after receiving information sent by the auxiliary CPU. When the main FPGA receives trip information, the main FPGA comparing the consistency of current trip information obtained from the main CPU with current trip information obtained from the auxiliary FPGA.
机译:一种用于确保智能变电站的跳闸保护的可靠性的装置和方法。该装置包括连接在一起的主CPU和辅助CPU,以及连接在一起的主FPGA和辅助FPGA。主FPGA和辅助FPGA连接到保护装置的物理层,主CPU和辅助CPU连接到被保护设备的状态监视数据输出端。主CPU将处理结果发送到主FPGA,辅助CPU将处理结果发送到辅助FPGA,并且辅助FPGA在接收到辅助CPU发送的信息后,将当前信息与主FPGA同步。当主FPGA接收到跳闸信息时,主FPGA将从主CPU获得的当前跳闸信息与从辅助FPGA获得的当前跳闸信息的一致性进行比较。

著录项

  • 公开/公告号GB201811082D0

    专利类型

  • 公开/公告日2018-08-22

    原文格式PDF

  • 申请/专利权人 NR ELECTRIC CO. LTD;NR ENGINEERING CO. LTD;

    申请/专利号GB20180011082

  • 发明设计人

    申请日2016-04-14

  • 分类号H02J13;H04L1/22;

  • 国家 GB

  • 入库时间 2022-08-21 12:32:28

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