Method for improving SFDR and SNDR of capacitor-resistor combined SAR ADC by capacitor re-configuration

摘要

A method for improving a spurious free dynamic range and a signal-to-noise-and-distortion ratio of a capacitor-resistor combined successive approximation register analog-to-digital converter by arranging 128 unit capacitors in a positive array and a negative array, dividing unit capacitors of symmetrical positions of the positive array and the negative array into groups to yield a total of 128 groups of capacitors, acquiring 128 digital codes corresponding to the 128 groups of capacitors, sorting the 128 groups of capacitors from maximum to minimum according to the 128 digital codes obtained, and recording the 128 groups of capacitors after sorting as C1-0128; selecting 64 groups of capacitors from C33 to C96, and reconfiguring the 64 groups of capacitors in capacitor arrays of the capacitor-resistor analog-to-digital converter. By sorting, selecting, and re-configuring the capacitors, the calibration of the capacitor mismatch is realized. No complex least-mean-square (LMS) algorithm is required.