首页> 外国专利> Low dielectric constant silicon oxide-based dielectric layer for integrated circuit structures having improved compatibility with via filler materials, and method of making same

Low dielectric constant silicon oxide-based dielectric layer for integrated circuit structures having improved compatibility with via filler materials, and method of making same

机译:具有改善的与通孔填充材料的相容性的用于集成电路结构的低介电常数氧化硅基介电层及其制造方法

摘要

The capacitor that one integrated circuit structure is disclosed between nigh conductive portion can be used carbon containing low k silicon oxide dielectric materials and wherein reduce, by the careful control of the carbon content of the dielectric material in two regions of integrated circuit structure, the problem of without facilitating via poisoning. It include region between the conductor wire for the neighbouring protrusion that first area is formed on the insulating layer below one, wherein undesirable capacitor can be horizontally formed between such adjacent conductor wire, and the secondth area includes region on the conductor wire of protrusion, wherein through-hole, which is usually formed from the coating that the conductor wire of the protrusion by dielectric layer is interconnected to metal, upwardly extends. In one embodiment, the carbon containing low k silicon oxide dielectric materials for first area between the conductor wire of neighbouring protrusion have a high carbon content to provide the maximum reduction of the dielectric constant of the dielectric material of the maximum reduction in the horizontal capacitor for developing between horizontally adjacent line, and the carbon containing low k silicon oxide dielectric materials for the secondth area on the conductor wire of protrusion have the carbon content of a reduction to mitigate the poisoning of the through-hole formed by the dielectric material in this secondth area. Two first and second regions have the carbon content of same or like reduction in another embodiment, it is not enough in the carbon containing low k silicon oxide dielectric materials for two first and second respective regions for therefore providing the carbon content of undesirable capacitor for being enough horizontally to reduce formation between the conductor wire of the neighbouring protrusion in firstth area via making in the 2nd region.Among formed through-hole poisoning lead toimage
机译:可以在相邻的导电部分之间公开一种集成电路结构的电容器可以使用含碳的低k氧化硅介电材料,并且通过仔细控制集成电路结构的两个区域中的介电材料的碳含量来减少该问题。没有通过中毒来促进。它包括用于相邻突起的导线之间的区域,其中第一区域形成在一个绝缘层下面的绝缘层上,其中不希望的电容器可以水平地形成在这种相邻的导线之间,并且第二区域包括突起的导线上的区域,其中通孔通常向上延伸,该通孔通常由通过介电层将突起的导线互连到金属上的涂层形成。在一个实施例中,用于相邻突起的导线之间的第一区域的含碳的低k氧化硅介电材料具有高的碳含量,以提供电介质材料的介电常数的最大降低,从而最大程度地减少了水平电容器的电容量。在水平相邻线之间展开,并且用于突出的导线上第二区域的含碳低k氧化硅介电材料的碳含量降低,从而减轻了该第二介电材料形成的通孔的中毒区。在另一个实施例中,两个第一和第二区域具有相同或类似减少的碳含量,这对于两个第一和第二区域而言在含碳的低k氧化硅介电材料中是不够的,因此不能提供不希望的电容器的碳含量。通过在第二区域中进行通孔,可以在水平方向上充分地减少在第一区域中相邻突起的导线之间的形成。形成的通孔中毒会导致

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