Circuit and method for determining chirp signal linearity and phase noise of FMCW radar

摘要

In the described example, a test device (500) for FMCW radar (502) includes an input for receiving a chirp signal generated by FMCW radar (502). An IQ downconverter (504) coupled to the input downconverts the chirp signal. A digitizer (510) extracts the digitized IQ signal from the down-converted chirp signal. A processor (514) coupled to the digitizer (510) determines at least one of frequency linearity and phase noise of the chirp signal.