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System Architecture Method and Apparatus for Adaptive Hardware Fault Detection with Hardware Metrics Subsystem

机译:带有硬件度量子系统的自适应硬件故障检测的系统架构方法和装置

摘要

A method, system, and architecture (100) for adaptively field testing for hardware faults on an integrated circuit device includes a central quality assurance server (121) which receives specified hardware metric data (131) monitored at an integrated circuit device (110) in the field, identifies prioritized built-in self-test (BIST) fault detection tests (134) based on the specified hardware metric data, securely downloads the prioritized BIST fault detection tests (132) to the integrated circuit device for execution to identify a first hardware fault at the integrated circuit device, and then receives diagnosis information (133) identifying the first hardware fault from the integrated circuit device which is used to update the prioritized BIST fault detection tests.
机译:用于对集成电路设备上的硬件故障进行自适应现场测试的方法,系统和体系结构( 100 )包括中央质量保证服务器( 121 ),该服务器接收指定的硬件度量在现场由集成电路设备( 110 )监视的数据( 131 )标识了优先的内置自检(BIST)故障检测测试( 134 ),根据指定的硬件指标数据,将优先的BIST故障检测测试( 132 )安全地下载到集成电路设备,以执行该操作,以识别集成电路设备上的第一个硬件故障,然后从集成电路设备接收识别第一硬件故障的诊断信息( 133 ),该信息用于更新优先的BIST故障检测测试。

著录项

  • 公开/公告号US2019250210A1

    专利类型

  • 公开/公告日2019-08-15

    原文格式PDF

  • 申请/专利权人 NXP USA INC.;

    申请/专利号US201815893485

  • 发明设计人 XIAO SUN;WEN CHEN;JAYANTA BHADRA;

    申请日2018-02-09

  • 分类号G01R31/3187;G01R31/317;G06F11/27;G01R31/3183;

  • 国家 US

  • 入库时间 2022-08-21 12:10:39

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