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MEMORY INTERFACE, MEMORY CONTROLLER HAVING THE MEMORY INTERFACE, AND MEMORY SYSTEM HAVING THE MEMORY CONTROLLER

机译:内存接口,具有内存接口的内存控制器,以及具有内存控制器的内存系统

摘要

There are provided a memory interface, a command queue controller configured to determine an execution order of normal commands and a suspend command; a command time controller configured to receive the normal commands, and output command and time information by providing a corresponding additional operation time to each of the normal commands; a command time manager configured to match the command and time information to each of the normal commands to be stored therein, and output an end signal; and an input/output interface configured to receive the normal commands and the suspend command, and transmit the normal commands and the suspend command to a memory device through a channel.
机译:提供了一种存储器接口,配置为确定普通命令的执行顺序的命令队列控制器和挂起命令;命令时间控制器,被配置为接收正常命令,并通过向每个正常命令提供相应的附加操作时间来输出命令和时间信息;命令时间管理器,被配置为使命令和时间信息与要存储在其中的每个正常命令匹配,并输出结束信号;输入/输出接口,其被配置为接收正常命令和暂停命令,并通过通道将正常命令和暂停命令发送到存储设备。

著录项

  • 公开/公告号US2019227736A1

    专利类型

  • 公开/公告日2019-07-25

    原文格式PDF

  • 申请/专利权人 SK HYNIX INC.;

    申请/专利号US201816119575

  • 发明设计人 SUNG KWAN HONG;IK SUNG OH;

    申请日2018-08-31

  • 分类号G06F3/06;

  • 国家 US

  • 入库时间 2022-08-21 12:09:31

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