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MEMORY INTERFACE, MEMORY CONTROLLER HAVING THE MEMORY INTERFACE, AND MEMORY SYSTEM HAVING THE MEMORY CONTROLLER
MEMORY INTERFACE, MEMORY CONTROLLER HAVING THE MEMORY INTERFACE, AND MEMORY SYSTEM HAVING THE MEMORY CONTROLLER
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机译:内存接口,具有内存接口的内存控制器,以及具有内存控制器的内存系统
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摘要
There are provided a memory interface, a command queue controller configured to determine an execution order of normal commands and a suspend command; a command time controller configured to receive the normal commands, and output command and time information by providing a corresponding additional operation time to each of the normal commands; a command time manager configured to match the command and time information to each of the normal commands to be stored therein, and output an end signal; and an input/output interface configured to receive the normal commands and the suspend command, and transmit the normal commands and the suspend command to a memory device through a channel.
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