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PROCESSOR AND CHIPSET CONTINUITY TESTING OF PACKAGE INTERCONNECT FOR FUNCTIONAL SAFETY APPLICATIONS

机译:用于功能安全应用的包装互连的处理器和芯片组连续性测试

摘要

Methods and apparatus relating to processor and chipset continuity testing of package interconnect for functional safety applications are described. In an embodiment, voltage divider logic circuitry divides a reference voltage. Controller logic circuitry compares a divided voltage value from a node of the voltage divider logic circuitry and a threshold voltage value. A first end of the voltage divider logic circuitry is coupled to receive the reference voltage and a second end of the voltage divider logic circuitry is coupled to a Non-Critical-To-Function (NCTF) solder ball. The controller logic circuitry generates an error signal in response to a mismatch between the divided voltage value and the threshold voltage value. Other embodiments are also disclosed and claimed.
机译:描述了与用于功能安全应用的封装互连的处理器和芯片组连续性测试有关的方法和装置。在一个实施例中,分压器逻辑电路对参考电压进行分压。控制器逻辑电路比较来自分压器逻辑电路的节点的分压电压值和阈值电压值。分压器逻辑电路的第一端耦合以接收参考电压,而分压器逻辑电路的第二端耦合至非关键功能(NCTF)焊球。控制器逻辑电路响应于分压值和阈值电压值之间的不匹配而产生误差信号。还公开和要求保护其他实施例。

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