首页> 外国专利> METHOD FOR THE FABRICATION OF ULTRALOW VOLTAGE OPERATED, REDUCED BIAS STRESS, MULTI-LAYER DIELECTRIC SYSTEM COMPRISING N-TYPE ORGANIC FIELD EFFECT TRANSISTORS

METHOD FOR THE FABRICATION OF ULTRALOW VOLTAGE OPERATED, REDUCED BIAS STRESS, MULTI-LAYER DIELECTRIC SYSTEM COMPRISING N-TYPE ORGANIC FIELD EFFECT TRANSISTORS

机译:包含N型有机场效应晶体管的超低压操作,减小的Bias应力多层电介质的制造方法

摘要

The present invention reports an ultra-low voltage operated, highly stable, n-type Organic Field Effect Transistor (OFET) device and a method for fabricating such OFET device. The OFET device of the present invention includes a base substrate (1); a gate electrode (3) deposited on said base substrate; layered hybrid dielectrics (4-5-6) deposited on said gate electrode having top and bottom dielectric layer of low dielectric constant based dielectric materials and intermediate dielectric layer of high dielectric constant based dielectric material; n-type organic semiconducting layer (7) based active channel deposited on top of said layered hybrid dielectrics and a source electrode and a drain electrode (8, 9) deposited on the top side of said n-type organic semiconducting layer.
机译:本发明报道了一种超低压操作的,高度稳定的,n型有机场效应晶体管(OFET)器件及其制造方法。本发明的OFET装置包括基底基板(1);和沉积在所述基础衬底上的栅电极(3);沉积在所述栅电极上的层状混合电介质(4-5-6),其具有基于低介电常数的介电材料的顶部和底部介电层以及基于高介电常数的介电材料的中间介电层;基于n型有机半导体层(7)的有源沟道沉积在所述层状混合电介质的顶部上,并且源电极和漏电极(8、9)沉积在所述n型有机半导体层的顶侧上。

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