首页> 外国专利> TRACE RECORDING BY LOGGING INFLUXES TO AN UPPER-LAYER SHARED CACHE, PLUS CACHE COHERENCE PROTOCOL TRANSITIONS AMONG LOWER-LAYER CACHES

TRACE RECORDING BY LOGGING INFLUXES TO AN UPPER-LAYER SHARED CACHE, PLUS CACHE COHERENCE PROTOCOL TRANSITIONS AMONG LOWER-LAYER CACHES

机译:通过将流量记录到上层共享缓存中进行跟踪记录,以及下层缓存中的缓存一致性协议过渡

摘要

Trace recording based on data influxes to an outer-level cache and cache coherence protocol (CCP) transitions between inner caches. Example computing device(s) include a plurality of processing units, a plurality of (N-1)-level caches, and an N-level cache that is associated with two or more of the (N-1)-level caches and that is a backing store for the two or more (N-1)-level caches. Based at least on detecting influx(es) of data to a location in the N-level cache during execution across the processing units, the computing device(s) causes the influx(es) of data to be logged. The computing device(s) also causes one or more (N-1)-level CCP transitions between the two or more (N-1)-level caches to be logged. The (N-1)-level CCP transitions result from the location being accessed by two or more of the processing units.
机译:基于数据的跟踪记录会流入外部高速缓存,内部高速缓存之间的高速缓存一致性协议(CCP)转换。示例计算设备包括多个处理单元,多个(N-1)级高速缓存以及与两个或多个(N-1)级高速缓存相关联的N级高速缓存,并且是两个或更多(N-1)级缓存的后备存储。至少基于在跨处理单元的执行期间检测到数据流入N级高速缓存中的位置,计算设备使数据流入被记录。计算设备还使两个或多个(N-1)级缓存之间的一个或多个(N-1)级CCP转换被记录。 (N-1)级CCP转换是由两个或多个处理单元访问的位置导致的。

著录项

  • 公开/公告号WO2019160666A1

    专利类型

  • 公开/公告日2019-08-22

    原文格式PDF

  • 申请/专利权人 MICROSOFT TECHNOLOGY LICENSING LLC;

    申请/专利号WO2019US15056

  • 发明设计人 MOLA JORDI;

    申请日2019-01-25

  • 分类号G06F11/36;G06F11/34;

  • 国家 WO

  • 入库时间 2022-08-21 11:53:32

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