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Early miss prediction based periodic cache bypassing technique streaming multiprocessor and embedded system performed by the technique

机译:基于早期未命中预测的周期性缓存绕过技术流式多处理器和由该技术执行的嵌入式系统

摘要

The present invention relates to periodic cache bypassing technique based on cache hit ratio prediction and a streaming multiprocessor and embedded system using the same and, more specifically, to periodic cache bypassing technique capable of improving cache hit ratio while improving performance of an embedded system by decreasing the number of access to L1 data cache through periodic cache bypassing technique based on cache hit ratio prediction and a streaming multiprocessor and embedded system using the same.
机译:技术领域本发明涉及基于高速缓存命中率预测的周期性高速缓存绕过技术以及使用其的流式多处理器和嵌入式系统,并且更具体地,涉及一种能够通过降低高速缓存命中率同时提高嵌入式系统的性能来改善高速缓存命中率的周期性高速缓存绕过技术。通过基于缓存命中率预测的周期性缓存绕过技术以及使用该缓存的流式多处理器和嵌入式系统访问L1数据缓存的次数。

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