Designing a base clock frequency of a processor based on usage parameters

摘要

A processing device includes a plurality of processing cores, a control register associated with a first processing core of the plurality of processing cores to store a first base clock frequency value on which the first processing core is to run, and a power management circuit to receive a base clock frequency request a second base clock frequency value includes storing the second base clock frequency value in the control register to cause the first processing core to run at the second base clock frequency value and exposing the second base clock frequency value to a hardware interface associated with the power management circuit.