Apparatus and method for multiplying a complex number by the conjugate

摘要

An embodiment of a processor includes, for example: a decoder for decoding a first instruction to generate a decoded instruction; a first source register for storing a first plurality of packed real and imaginary data elements; a second source register for storing a second plurality of packed real and imaginary data elements; and an execution circuit for executing the decoded instruction, the execution circuit comprising: a multiplication circuit for selecting real and imaginary data elements in the first source register and the second source register for multiplication, an addition circuit for adding a first subset of the plurality of imaginary products, and subtracting a second one Subset of the plurality of imaginary products to produce a first temporal result, and to add a third subset of the plurality of imaginary products and to subtract a fourth subset of the plurality of imaginary products to produce a second temporal result, an accumulation circuit for combining the first temporary result with first data of a destination register, and for combining the second temporary result with second data of the destination register, and for storing the first final result sses and the second final result in the destination register.