首页> 外国专利> BIPOLAR STRUCTURES HAVING IMPROVED BVCEO/RCS TRADE-OFF MADE WITH DEPLETED COLLECTOR COLUMNS

BIPOLAR STRUCTURES HAVING IMPROVED BVCEO/RCS TRADE-OFF MADE WITH DEPLETED COLLECTOR COLUMNS

机译:双极结构改善了BVCEO / RCS的权衡,收集柱已耗尽

摘要

In accordance with the invention, there are various methods of making an integrated circuit comprising a bipolar transistor. According to an embodiment of the invention, the bipolar transistor can comprise a substrate, a collector comprising a plurality of alternating doped regions, wherein the plurality of alternating doped regions alternate in a lateral direction from a net first conductivity to a net second conductivity, and a collector contact in electrical contact with the collector. The bipolar transistor can also comprise a heavily doped buried layer below the collector, a base in electrical contact with a base contact, wherein the base is doped to a net second conductivity type and wherein the base spans a portion of the plurality of alternating doped regions, and an emitter disposed within the base, the emitter doped to a net first conductivity, wherein a portion of the alternating doped region under the emitter is doped to a concentration of less than about 3x10SUP12 /SUPcmSUP-2/SUP.
机译:根据本发明,存在多种制造包括双极晶体管的集成电路的方法。根据本发明的一个实施例,双极晶体管可以包括衬底,包括多个交替掺杂区的集电极,其中多个交替掺杂区在横向方向上从净第一导电率到净第二导电率交替,并且与集电极电接触的集电极触点。双极晶体管还可以包括在集电极下方的重掺杂掩埋层,与基极接触电接触的基极,其中该基极被掺杂为净第二导电类型,并且其中该基极跨越多个交替掺杂区域的一部分。以及设置在基极内的发射极,该发射极被掺杂为净第一导电性,其中该发射极下方的交替掺杂区域的一部分被掺杂为浓度小于约3x10 12 cm -2

著录项

  • 公开/公告号EP1922758B1

    专利类型

  • 公开/公告日2019-12-04

    原文格式PDF

  • 申请/专利权人 INTERSIL AMERICA INC.;

    申请/专利号EP20060802800

  • 发明设计人 BEASOM JAMES DOUGLAS;

    申请日2006-09-01

  • 分类号H01L29/06;H01L29/08;H01L29/732;

  • 国家 EP

  • 入库时间 2022-08-21 11:41:41

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