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REALTIME CRITICAL TIMING PATH POTENTIAL FAULT EVENT DETECTION AND PREVENTION FOR EMBEDDED CORES
REALTIME CRITICAL TIMING PATH POTENTIAL FAULT EVENT DETECTION AND PREVENTION FOR EMBEDDED CORES
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机译:嵌入式核心的实时关键时序路径潜在故障事件检测与预防
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摘要
A fault detection circuit may be used to determine if voltage supplied by a voltage regulator as power to sequential logic circuitry falls below a minimum voltage expected to be required by the sequential logic circuitry for proper operation. Information regarding voltage levels supplied to the sequential logic circuitry prior to such an occurrence may be written to a memory, for example to allow for further analysis.
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