The device has a processing circuit (8) for executing data processing in response to a software process and a memory access circuit (26) for exercising ownership of a memory area. A given memory area is associated with a designated owner realm from multiple realms, and each realm corresponds to part of at least one software process. The owner realm reserves the right to prevent other realms from accessing the data stored in a given memory area (including realms running at higher privilege levels). The realms are managed according to the realm hierarchy, and in the realm hierarchy, each realm other than the root realm is a child realm initialized in response to a command triggered by its parent realm. In response to the invalidation command, the realm management unit (20) makes the target realm and any descendant realms of the target realm inaccessible to the processing circuit (8).
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