Dynamic back bias in CMOS processes to optimize power consumption

摘要

A power control circuit for a hearing device is devised. The power control circuit has a switched-capacitor power supply, a substrate bias control circuit, a desired performance reference circuit, a performance monitor circuit, a first plurality of N-type semiconductors and a second plurality of P-type semiconductors. The performance monitor circuit is adapted to monitor the supply voltage, the first substrate bias control voltage and the second substrate bias control voltage, respectively, and is adapted to provide a measure of performance to the substrate bias control circuit. The substrate bias control circuit is adapted to optimize the current consumption of the circuit by continuously altering the levels of the first substrate bias control voltage and the second substrate bias control voltage based on the performance measurement.