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Computationally efficient nano-scale conductor resistance model

机译:计算有效的纳米级导体电阻模型

摘要

Disclosed is technology for evaluating the performance of various conducting structures in an integrated circuit. A three-dimensional circuit representation of a circuit design is provided. The three-dimensional circuit representation includes a plurality of conducting structures including a first conducting structure which has a length L. A plurality of longitudinally adjacent volume elements is identified in the conducting structure. A width Wn and a height Hn are estimated for each volume element n in the conducting structure. Furthermore, the local resistivity ρn for each volume element n is estimated based on a function that is dependent upon the length L of the conducting structure and the width Wn and height Hn of the volume element n. The resistance of a conducting structure is estimated in dependence upon the resistivity ρn for each of the volume elements n in the plurality of volume elements in the conducting structure.
机译:公开了用于评估集成电路中各种导电结构的性能的技术。提供了电路设计的三维电路表示。三维电路表示包括多个导电结构,该多个导电结构包括具有长度L的第一导电结构。在该导电结构中标识了多个纵向相邻的体积元素。为导电结构中的每个体积元素n估计宽度W n 和高度H n 。此外,基于依赖于导电结构的长度L以及宽度W n 和高度的函数来估计每个体积元素n的局部电阻率ρ n 体积元素n的H n 。根据导电结构中多个体积元素中每个体积元素n的电阻率ρ n 估算导电结构的电阻。

著录项

  • 公开/公告号US10685163B2

    专利类型

  • 公开/公告日2020-06-16

    原文格式PDF

  • 申请/专利权人 SYNOPSYS INC.;

    申请/专利号US201815905719

  • 发明设计人 KARIM EL SAYED;VICTOR MOROZ;

    申请日2018-02-26

  • 分类号G06F17/50;G06F30/394;G06F30/20;G06F30/367;H01L23/522;

  • 国家 US

  • 入库时间 2022-08-21 11:31:35

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