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Optimizing integrated circuit designs based on interactions between multiple integration design rules

机译:基于多个集成设计规则之间的交互来优化集成电路设计

摘要

A technique for optimizing integrated circuit (IC) designs based on interaction between multiple integration design rules is provided. For a plurality of IC features, total risk values are determined based on multiple integration design rules. IC features are ordered based on the total risk values. IC features having the highest total risk values are selected based on a threshold count. An IC design is clipped around the high-risk IC features. An overall failure rate is simulated for the clipped area. If the overall failure rate exceeds a threshold, a predicted failure rate for each design rule that applies to IC features within the clipped area is calculated. A high-risk design rule is identified based on the predicted failure rates. The IC design is modified such that a difference between a design rule value of the high-risk design rule and a corresponding design value is reduced.
机译:提供了一种用于基于多个集成设计规则之间的交互来优化集成电路(IC)设计的技术。对于多个IC功能,基于多个集成设计规则确定总风险值。 IC功能根据总风险值排序。基于阈值计数选择具有最高总风险值的IC特征。 IC设计被限制在高风险IC功能周围。模拟了裁剪区域的整体故障率。如果总体故障率超过阈值,则将计算适用于裁剪区域内IC特性的每个设计规则的预测故障率。根据预测的故障率来确定高风险的设计规则。修改IC设计,使得减小高风险设计规则的设计规则值和对应的设计值之间的差异。

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