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Tracking core-level instruction set capabilities in a chip multiprocessor
Tracking core-level instruction set capabilities in a chip multiprocessor
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机译:跟踪芯片多处理器中的核心级指令集功能
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摘要
Techniques described herein generally relate to a task management system for a chip multiprocessor having multiple processor cores. The task management system tracks the changing instruction set capabilities of each processor core and selects processor cores for use based on the tracked capabilities. In this way, a processor core with one or more failed processing elements can still be used effectively, since the processor core may be selected to process instruction sets that do not use the failed processing elements.
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