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Duty-cycle control for power-level adjustment in switch-mode power amplifiers
Duty-cycle control for power-level adjustment in switch-mode power amplifiers
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机译:占空比控制,用于开关模式功率放大器中的功率电平调整
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摘要
An approach for accurately setting a duty cycle of PA switching waveforms uses an all-digital PVT sensor circuit. In various embodiments, the all-digital PVT sensor circuit measures a pulse width of a periodic reference signal using digital delay line, and subsequently, implements an off-chip digital calculation to program the digital delay line to delay this periodic reference signal so that, when the delayed periodic reference signal is combined with the original (undelayed) reference via a logical AND operation, the resulting signal conforms to a desired duty cycle. In one implementation, the PA is a class-D PA, which may have a single-ended configuration or a differential configuration having two single-ended structures operating in opposite phases.
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