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Differential non-volatile memory cell for artificial neural network

机译:人工神经网络的差分非易失性存储单元

摘要

Use of a non-volatile memory array architecture to realize a neural network (BNN) allows for matrix multiplication and accumulation to be performed within the memory array. A unit synapse for storing a weight of a neural network is formed by a differential memory cell of two individual memory cells, such as a memory cells having a programmable resistance, each connected between a corresponding one of a word line pair and a shared bit line. An input is applied as a pattern of voltage values on word line pairs connected to the unit synapses to perform the multiplication of the input with the weight by determining a voltage level on the shared bit line. The results of such multiplications are determined by a sense amplifier, with the results accumulated by a summation circuit.
机译:使用非易失性存储器阵列架构来实现神经网络(BNN)允许在存储器阵列内执行矩阵乘法和累加。用于存储神经网络的权重的单位突触由两个单独的存储单元的差分存储单元形成,例如具有可编程电阻的存储单元,每个连接在字线对和共享位线中的相应一个之间。在连接到单位突触的字线对上将输入作为电压值的模式施加,以通过确定共享位线上的电压电平来执行输入与权重的乘法。这种乘法的结果由读出放大器确定,结果由求和电路累加。

著录项

  • 公开/公告号US10643119B2

    专利类型

  • 公开/公告日2020-05-05

    原文格式PDF

  • 申请/专利权人 SANDISK TECHNOLOGIES LLC;

    申请/专利号US201916405178

  • 申请日2019-05-07

  • 分类号G06N3/04;G11C11/56;G11C13;G11C11/16;G06N3/08;G06N3/063;G11C16/04;G11C16/26;

  • 国家 US

  • 入库时间 2022-08-21 11:26:40

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