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SYSTEMS AND METHODS FOR EFFICIENTLY MAPPING NEURAL NETWORKS TO PROGRAMMABLE LOGIC DEVICES
SYSTEMS AND METHODS FOR EFFICIENTLY MAPPING NEURAL NETWORKS TO PROGRAMMABLE LOGIC DEVICES
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机译:有效地将神经网络映射到可编程逻辑设备的系统和方法
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摘要
The present disclosure relates to computer-implemented systems and methods for efficiently mapping neural networks to programmable logic devices (PLDs). In one implementation, a method for mapping a neural network to an FPGA may include receiving a data structure defining an architecture of the PLD; receiving a data structure defining an architecture of the neural network; partitioning the architecture of the PLD into a plurality of layers, each layer having a starting primitive adjacent to a first off-chip buffer and an ending primitive adjacent to a second off-chip buffer; mapping the architecture of the neural network onto one or more of the plurality of layers such that a data transfer size is at least locally minimized; scheduling the mapped architecture of the neural network for execution on the one or more of the plurality of layers; and outputting an execution sequence based on the scheduled and mapped architecture of the neural network.
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