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SYSTEMS AND METHODS FOR HARNESSING ANALOG NOISE IN EFFICIENT OPTIMIZATION PROBLEM ACCELERATORS

机译:高效优化问题加速器中模拟噪声的处理系统和方法

摘要

Systems and methods are provided for implementing a hardware accelerator. The hardware accelerator emulates a neural network, and includes a memristor crossbar array, and a non-linear filter. The memristor crossbar array can be programmed to calculate node values of the neural network. The nodes values can be calculated in accordance with rules to reduce an energy function associated with the neural network. The non-linear filter is coupled to the memristor crossbar array and programmed to harness noise signals that may be present in analog circuitry of the hardware accelerator. The noise signals can be harnessed such that the energy function associated with the neural network converges towards a global minimum and modifies the calculated node values. In some embodiments, the non-liner filter is implemented as a Schmidt trigger comparator.
机译:提供了用于实现硬件加速器的系统和方法。硬件加速器模拟神经网络,并包括忆阻器交叉开关阵列和非线性滤波器。忆阻器交叉开关阵列可以编程为计算神经网络的节点值。可以根据规则来计算节点值,以减少与神经网络相关的能量函数。非线性滤波器耦合到忆阻器交叉开关阵列,并经过编程以利用可能存在于硬件加速器的模拟电路中的噪声信号。可以利用噪声信号,使得与神经网络关联的能量函数收敛于全局最小值,并修改计算出的节点值。在一些实施例中,非线性滤波器被实现为施密特触发器比较器。

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