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NEURAL NETWORK SYSTEM INCLUDING GATE CIRCUIT FOR CONTROLLING MEMRISTOR ARRAY CIRCUIT

机译:包含门电路的神经网络系统,用于控制存储器阵列

摘要

A neural network system includes an array circuit and a gate circuit. The array circuit generates output data based on first input data, by a plurality of memory cells. The gate circuit outputs a select signal, based on defect information which is obtained based on the output data. A target memory cell, which is activated in response to the select signal, from among the plurality of memory cells is trained based on second input data, and the defect information is associated with a defect included in the plurality of memory cells.
机译:神经网络系统包括阵列电路和门电路。阵列电路通过多个存储单元基于第一输入数据生成输出数据。选通电路基于基于输出数据获得的缺陷信息来输出选择信号。基于第二输入数据来训练多个存储单元之中响应于选择信号而激活的目标存储单元,并且缺陷信息与多个存储单元中包括的缺陷相关联。

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