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Non-Volatile Multiple Time Programmable Integrated Circuit System with Selectiive Conversion to One Time Programmable or Permanent Configuration Bit Programming Capabilities and Related Methods

机译:选择性地转换为一次可编程或永久配置位编程能力的非易失性多次可编程集成电路系统及相关方法

摘要

Various embodiments include providing a MTJ-based LUT and adding a system that short circuits or causes dielectric layer breakdown of selected MTJ junctions to permanently finalize a desired logic state configuration of selected MTJs that is read out by the LUT. Additional embodiments disable dielectric layer breakdown or short circuit control circuits to prevent further alterations to MTJ that have not had their dielectric layers broken down or shorted out. A control system then alters reading out the MTJ-based LUT to sense original higher and lower resistance values of un-shorted/altered MTJs as a higher resistance state and a shorted or dielectric layer that has been broken down as a lower resistance state. This combines the flexibility of a multiple-time programmable LUT-based FPGA with the security and reliability of a one-time programmable LUT-based FPGA which has characteristics of a fixed logic non-programmable integrated circuit or application specific integrated circuit (ASIC).
机译:各种实施例包括提供基于MTJ的LUT,以及添加使所选MTJ结短路或引起其电介质层击穿的系统,以永久性地确定由LUT读出的所选MTJ的期望逻辑状态配置。另外的实施例禁用介电层击穿或短路控制电路,以防止对尚未使其介电层击穿或短路的MTJ进行进一步改变。然后,控制系统更改对基于MTJ的LUT的读出,以将未短路/更改的MTJ的原始较高和较低电阻值感测为较高电阻状态,并将短路或介电层已分解为较低电阻状态。这将基于多次可编程LUT的FPGA的灵活性与基于一次性可编程LUT的FPGA的安全性和可靠性相结合,该FPGA具有固定逻辑非可编程集成电路或专用集成电路(ASIC)的特性。

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