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SPECTRAL SHAPING OF SPREAD SPECTRUM CLOCKS/FREQUENCIES THROUGH POST PROCESSING

机译:通过后期处理扩展频谱时钟/频率的频谱形状

摘要

An integrated circuit (100). The integrated circuit (100) comprises a timebase generator (102) and a switch mode direct current-to-direct current (DC-to-DC) converter (104) coupled to the timebase generator (102). The timebase generator (102) comprises a linear feedback shift register (LFSR) (110), having an output and a logic circuit comprising a first logic inverter, a first AND logic gate, and a first multiplexer. The first logic inverter has an input coupled to a most significant bit of the output of the LFSR (110). The first AND logic gate has a first input coupled to a second most significant bit of the output of the LFSR (110) and a second input coupled to an output of the first logic inverter. A selector input of the first multiplexer is coupled to an output of the first AND logic gate.
机译:集成电路(100)。集成电路(100)包括时基生成器(102)和耦合到时基生成器(102)的开关模式直流-直流(DC-DC)转换器(104)。时基发生器(102)包括线性反馈移位寄存器(LFSR)(110),其具有输出和逻辑电路,该逻辑电路包括第一逻辑反相器,第一AND逻辑门和第一多路复用器。第一逻辑反相器的输入耦合到LFSR(110)的输出的最高有效位。第一与逻辑门具有耦合到LFSR(110)的输出的第二最高有效位的第一输入和耦合到第一逻辑反相器的输出的第二输入。第一多路复用器的选择器输入耦合到第一与逻辑门的输出。

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