MEMORY DIE HAVING WAFER WARPAGE-REDUCING ARRANGEMENTS AND STRUCTURES AND METHOD OF MAKING THE SAME

摘要

Memory dies on a wafer may include multiple memory blocks including bit lines extending along different directions. Each lithographic exposure process may include a first step in which lithographic patterns in first exposure fields are oriented in one direction, and a second step in which lithographic patterns in second exposure fields are oriented in another direction. The different orientations of bit lines and word lines may change local directions of stress to reduce wafer distortion. A three-dimensional memory device includes a pair of alternating stacks of insulating layers and electrically conductive layers and a backside contact assembly located in the backside trench therebetween. The backside contact assembly includes a composite non-metallic core.