Techniques for fast programming and reading of memory cells. A first set of bit lines are connected to a first set of NAND strings and are interleaved with a second set of bit lines which are connected to a second set of NAND strings. The first set of NAND strings can be programmed by driving a voltage on the first set of bit lines while floating a voltage on the second set of bit lines to reduce capacitance between the bit lines and have a relatively high and low access speed Provide storage density (e.g. bits per memory cell). The second set of NAND strings can be programmed by simultaneously driving a voltage on the first and second sets of bit lines to provide a relatively low access speed and a relatively high storage density.
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