DISTRIBUTED PROTECTION AGAINST ELECTRICAL OVERSTRAINING FOR COMMUNICATION APPLICATIONS WITH LARGE DENSITY AND HIGH DATA RATE

摘要

Protection against electrical overstress for high speed applications such as integrated communication of multiple subsystems is provided. In certain embodiments, a semiconductor chip with distributed and configurable protection against electrical overstress is provided. The semiconductor die includes signal pads, a core circuit electrically connected to the signal pads, and a configurable overstress protection arrangement operable to protect the core circuit from electrical overstress at the signal pads. The configurable overuse protection arrangement includes a plurality of segmented overuse protection devices of two or more different device types, and both a number of selected overuse protection devices and a device type of the selected overuse protection devices are programmable. The subsystem configurations are made possible by FinFET technology. Such configurable overstress protection arrangements can be distributed across the chip to protect not only core circuit subsystems at the chip pads, but also between internal subsystem communication interfaces operating in different power domains.