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Pixel with global shutter in tension mode

机译:处于张力模式的全局快门像素

摘要

The present disclosure relates to a pixel readout circuit comprising: a level setting capacitor (114) having a first terminal coupled to an output node of a pixel circuit; first and second read paths (RO1, RO2) each comprising a selection transistor (TS1, TS2) and a read capacitor (C_SH1, C_SH2) for storing a voltage level captured by the pixel circuit; and a source follower transistor (302) having its control node coupled to a second terminal of the level-fixing capacitor (114), a first of its main conduction nodes coupled to a first supply voltage rail (VDD, GND) and a second of its main conduction nodes coupled to the first and second read paths (RO1, RO2).
机译:本公开涉及一种像素读出电路,包括:电平设置电容器(114),其第一端子耦合到像素电路的输出节点;以及第一和第二读取路径(RO1,RO2)均包括选择晶体管(TS1,TS2)和用于存储由像素电路捕获的电压电平的读取电容器(C_SH1,C_SH2);源极跟随器晶体管(302),其控制节点耦合到电平固定电容器(114)的第二端,其主传导节点中的第一耦合到第一电源电压轨(VDD,GND),第二节点的第二其主传导节点耦合到第一和第二读取路径(RO1,RO2)。

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