Envelope detection electronic circuit and corresponding demodulator

摘要

The envelope detection electronic circuit comprises a detection stage (7) comprising at least one MOS transistor (T1, T2, T5, T6, T7) configured to receive a radiofrequency input signal (SER) and to deliver an internal signal (SI) from the input signal (SER), the bias point of said at least one transistor (T1, T2, T5, T6, T7) being intended to be controlled by the input signal (SER) and a control signal (SC), anda processing stage (8) coupled to the detection stage (7) and configured to provide a low frequency output signal (Vout) from the internal signal (SI) and to output the signal control signal (SC) from the output signal (Vout), so that the value of the control signal (SC) decreases as the average power of the input signal (SER) increases, and vice versa. Figure for the abstract: Fig 2