An apparatus and method are provided for transferring data between address ranges in memory. The apparatus comprises a data transfer controller, that is responsive to a data transfer request received by the apparatus from a processing element, to perform a transfer operation to transfer data from at least one source address range in memory to at least one destination address range in the memory. A redirect controller is then arranged, whilst the transfer operation is being performed, to intercept an access request that specifies a target address within a target address range, and to perform a memory redirection operation so as to cause the access request to be processed without awaiting completion of the transfer operation. Via such an approach, the apparatus can effectively hide from the source of the access request the fact that the transfer operation is in progress, and hence the transfer operation can be arranged to occur in the background, and in a manner that is transparent to the software executing on the source that has issued the access request.
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