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System and method for improving scan hold-time violation and low voltage operation in sequential circuit

摘要

According to one general aspect, an apparatus may include a flip-flop circuit. The flip-flop circuit may include a selection circuit, a memory element circuit, a clock circuit. The selection circuit to select, as the selected input signal, between at least two input signals. The memory element circuit synchronously controlled by a clock signal, and configured to store the selected input signal. The clock circuit configured to output, at least, an earlier version of the clock signal and a later version of the clock signal. The selection circuit is configured to be synchronously controlled, at least in part, by the earlier version of the clock signal such that the selected input signal is held stable when being read by the memory element circuit.

著录项

  • 公开/公告号US10720204B2

    专利类型

  • 公开/公告日2020.07.21

    原文格式PDF

  • 申请/专利权人

    申请/专利号US16358681

  • 发明设计人 Matthew Berzins;

    申请日2019.03.19

  • 分类号

  • 国家 US

  • 入库时间 2022-08-21 10:58:29

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