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Dynamic Voltage and Frequency Scaling and Adaptive Body Biasing for Active and Leakage Power Reduction in MPSoC: a Literature Overview

机译:mpsoC中有源和漏电功率降低的动态电压和频率调节以及自适应体偏置:文献综述

摘要

Power is an important design constraint for all nomadic and tethered devices as mobile phones or media-boxes today. This is mainly because it limits their operational time or because of the required operational thermal conditions. In order to keep the pace with increasing number of use-cases while increasing the lifetime, power reduction is enforced to all parts of a device, thus also for the embedded chipset.udFor this and other reasons like cost and size, the whole chipset has been integrated into a multiprocessor system-on-chip (MPSOC). As a complex and often heterogeneous system that executes different mixtures of applications with the variable workload, not all of its parts are utilized all the time. This introduces spare time in the system, denoted as slack that is possible to exploit for lower power and energy consumption by power management (PM). The most common techniques are adaptive body biasing and dynamic voltage and frequency scaling of a part of a system or the system as a whole.ududThe scope of our research is power management including these techniques on an MPSoC executing streaming applications, such as audio/video codecs, telecom services (protocols), or any other firm and soft real time applications. A lot of previous research has been done on this topic, mostly focusing on the isolated parts of the system. However, focus has recently been moved to the system-wise approach.ududThis paper is an overview of the commercial and solutions from academia, published until now. Special attention is given to the state-of-the-art infrastructure for PM and its dynamic possibilities to react and save power. We favourite the conservative approaches that do not disturb regular execution and do not introduce any additional delay or deadline misses comparing to the execution without power management. An overview of advanced PM is presented. Additionally, we elaborate the trade-off between race-to-idle and performance-on demand approaches reflecting the difference in static and dynamic power consumption.
机译:对于当今的所有移动设备和系留设备(如移动电话或媒体盒)而言,功率是重要的设计约束。这主要是因为它限制了它们的运行时间或由于所需的运行热条件。为了跟上用例数量的增加并延长使用寿命,设备的所有部分(包括嵌入式芯片组)都必须降低功耗。 ud由于这个以及其他原因,例如成本和尺寸,整个芯片组已被集成到多处理器片上系统(MPSOC)中。作为一个复杂且通常是异构的系统,该系统执行具有可变工作负载的应用程序的不同混合,因此并非所有部分都一直被利用。这在系统中引入了空闲时间,表示为空闲时间,可以通过电源管理(PM)来利用它来降低功耗和能耗。最普遍的技术是系统的一部分或整个系统的自适应主体偏置以及动态电压和频率缩放。 ud ud我们的研究范围是电源管理,包括在执行MPSoC的MPSoC上的这些技术,例如音频/视频编解码器,电信服务(协议)或任何其他公司和软件实时应用程序。以前已经有很多关于此主题的研究,主要集中在系统的隔离部分。但是,最近的焦点已转移到系统方法上。 ud ud本文概述了迄今为止学术界的商业和解决方案。我们特别关注PM的最新基础设施及其动态反应和节能的可能性。与没有电源管理的执行相比,我们喜欢保守的方法,这些方法不会干扰常规执行,并且不会引入任何额外的延迟或截止期限。介绍了高级PM的概述。此外,我们详细阐述了从怠速到怠速和按需性能的方法之间的折衷,反映了静态和动态功耗的差异。

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