Research on A Parallel CAM-based Hardware System for Parallel Information Detection and Its Applications

摘要

Information Detection Hardware System plays an important role in search engines or matching systems such as text search, pattern matching, image matching, face detection and many others. The objective of this dissertation is to design an ultra-fast parallel information detector for search systems employing CAM and SHIFT circuits to enhance search performance of the systems. This structure has not been proposed by other research works. CAM is designed basing on 2-port RAM blocks on FPGA. The CAM design, which is flexible and effective on various FPGA platforms, returns multi-match values in parallel. The search systems are designed for 1-D data and 2-D data basing on CAM. The proposed system for 1-D data has a simple structure. It consists of multiple CAM blocks and SHIFT circuits operating in parallel. The results are determined by an AND logic circuit. The proposed system architecture for 2-D data is similar to the 1-D data system. However, in the 2-D data system, the system only employs one CAM block, one SHIFT circuit, OR logic circuit, AND logic circuit and an FSA to control the system operations. The purposes of the FSA are to save logic resources, and to circulate each input and distance value of query data to the single CAM, SHIFT, OR and AND logic circuit. The 2-D data system can be used for exact image matching or approximate image matching with the corresponding search patterns. The search pattern is defined as a combination of query data inputs and their distance values. The search pattern is applied to the system for data detection or pattern matching. There are search patterns for 1-D data and 2-D data. Besides, the multi-core system is also proposed by combining many search cores with a 16-bit DSP. Each core can be the proposed system on 1-D data or 2-D data operating in parallel. The DSP independently works with the single search cores, controls the system, and performs calculation of search results for specific applications. By combined with the DSP, performance of data detection and processing of the system is improved. In general, the proposed systems have simple structures and do not use any complex computations or micro-processors for searching data. This increases the search performance, saves the least search time and clock cycles. The advantage of the proposed systems is ultra-fast search time by employing parallel structures and CAMu27s multi-match values in concurrence. The search time of the 1-D data system is mainly consumed by CAM blocks, SHIFT, AND circuits. In the 2-D data system, the search time is the number of inputs multiplied by executive clock cycles of CAM block, SHIFT, OR, AND circuits. The search time of the proposed systems is the fastest among all systems. The proposed systems can be used as a common accelerator for a variety of applications such as text search, temperature analysis, DNA sequence search (1-D data); face detection, pattern matching, pattern recognitions, authentication with watermarking, motion detection (2-D data); stereoscopy applications (3-D data) and so on. The proposed systems are implemented on FPGA in advance for functional verification then designed on an ASIC to make sure that the systems can operate on a physical chip. There are 2 full chips which are successfully implemented by using 0.18 m CMOS technology, and 1 chip is designed on 65nm SOI technology. One of them is dedicated to the 1-D data system with 0.18 m CMOS technology, and the other ones are designed for the 2-D data systems with 0.18 m CMOS technology and low power 65nm SOI technology. Finally, the proposed systems for 1-D data and 2-D data have been successfully implemented on hardware in both FPGA and ASIC. The systems are designed using digital design flow. They can be exported under IP cores which independently operate on hardware platforms (FPGA or ASIC). Some applications of the systems have been developed on FPGA boards and presented in this dissertation to demonstrate the system operations in practical situations.