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Crosstalk mitigation of high-speed interconnects using modal signaling

机译:使用模态信令缓解高速互连的串扰

摘要

Today's high-speed I/O signaling links are faced with difficult challenges: due to manufacturing and technology limitations, the resources (pins and interconnects) available for off-chip signaling remain almost constant, while the throughput needed is increasing and the required aggregate bandwidths are moving into the Tb/s range. The solutions need to simultaneously satisfy the requirements for low power (typically 1-2 mW/Gb/s for short chip-to-chip links) and extremely reliable signaling (with target bit error rates as low as 1E-21 for memory links). The routing density is being increased, and faster edge rates of signals are being used, thus causing increased levels of electromagnetic coupling between interconnects. This results in various signal integrity impairments, which in turn limit the system performance and signaling rate. The focus of this research is to explore the application of modal decomposition of coupled transmission lines to crosstalk mitigation of high-speed interconnects, in particular far-end crosstalk (FEXT), which is the dominant noise source for modern single-ended memory links. Special attention is devoted to addressing the issues that arise over realistic tightly coupled cascaded channels with discontinuities in the signal path.First, we propose the application of generalized modal decomposition theory to the class of tightly coupled, nonhomogeneous and nonuniform channels with discontinuities. The proposed approach offers a robust method of extracting modal properties of the channel starting from the presumed channel geometry and structure, or from actual measured channel data, or a combination of both. Based on the results of generalized modal decomposition, optimal encoder, decoder and termination blocks for the modal signaling system are extracted from channel geometry or measurements. Due to the nonuniform structure of the communication channels, we propose the use of a frequency-dependent termination network for optimal signaling performance. We demonstrate the performance benefits over the suboptimal resistive grid termination network in terms of decision margin improvement and crosstalk-induced jitter reduction.In order to facilitate transceiver design, we explore a MIMO system perspective of modal signaling. In this context, some of the important system performance metrics are analyzed. We demonstrate the method of obtaining the modal decoder coefficients for near-optimum SNR for a given channel. We outline a methodology for determining the required number of bits of modal encoder and decoder precision given the target bit-error rate. Finally, we propose two approaches for practical system implementation of modal signaling, using (a) digital cores present in ADC/DAC based transceivers, and (b) analog frontend transceiver structure. For the analog transceiver, the design flow is demonstrated using the low-power digital CMOS process, using a case study of a typical controller-memory microstrip bus.
机译:当今的高速I / O信令链路面临着艰巨的挑战:由于制造和技术限制,片外信令可用的资源(引脚和互连)几乎保持不变,而所需的吞吐量却在增加,所需的总带宽也越来越大正在进入Tb / s范围。解决方案需要同时满足低功耗(对于短的芯片到芯片链路,通常为1-2 mW / Gb / s)和极其可靠的信令(对于存储器链路,目标误码率低至1E-21)的要求。 。布线密度正在增加,并且信号的边沿速率越来越快,从而导致互连之间的电磁耦合水平提高。这导致各种信号完整性受损,进而限制了系统性能和信令速率。这项研究的重点是探索耦合传输线的模态分解在减轻高速互连的串扰(特别是远端串扰(FEXT))方面的应用,FEXT是现代单端存储链路的主要噪声源。特别注意解决在信号路径中具有不连续性的现实紧耦合级联通道上出现的问题。首先,我们提出将广义模态分解理论应用于具有不连续性的紧耦合,非均匀和非均匀通道类型。所提出的方法提供了一种从假定的通道几何形状和结构,或者从实际测量的通道数据或者两者的组合开始提取通道的模态特性的鲁棒方法。根据广义模态分解的结果,从通道几何或测量中提取模态信令系统的最佳编码器,解码器和终端块。由于通信信道的结构不统一,我们建议使用频率相关的终接网络以实现最佳信令性能。我们在决策裕度提高和串扰引起的抖动减少方面证明了优于次优电阻网格终端网络的性能优势。为了促进收发器设计,我们探索了模态信令的MIMO系统观点。在这种情况下,分析了一些重要的系统性能指标。我们演示了获得给定通道的接近最佳SNR的模态解码器系数的方法。我们概述了在给定目标误码率的情况下确定模态编码器和解码器精度所需位数的方法。最后,我们提出两种用于模式信号的实际系统实现的方法,即使用(a)基于ADC / DAC的收发器中存在的数字核,以及(b)模拟前端收发器结构。对于模拟收发器,使用典型的控制器内存微带总线的案例研究,使用低功耗数字CMOS工艺演示了设计流程。

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    Milosevic Pavle;

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  • 年度 2011
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  • 原文格式 PDF
  • 正文语种 {"code":"en","name":"English","id":9}
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