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Dual-Mode Logic for Function Independent Fault Testing.

机译:双模式逻辑的功能独立故障测试。

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摘要

A method of using hardware redundancy to ease the problem of fault testing in combinational and sequential logic circuits is presented. Dual-mode logic gates are used to construct combinational logic circuits which can be tested for all single stuck-at faults using just two function-independent tests. Analogous results for sequential circuits are also presented. (Author)

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