Fast Integrating Eight-Bit Bilinear ADC (Analog-to-Digital Converter)

摘要

A fast gated charge integrating ADC has been developed for measuring short photomultiplier pulses at very high event rates. The circuit is bilinear with 100 pC full scale and a least count of 150 fC. It features dc coupling, a minimum gate width of 20 ns, a minimum time between events of 200 ns plus gate width, a two event buffer, and front-end zero suppression with 100 ns read time per hit channel. Five hundred channels have been built and installed in the rare K/sub L//sup 0/ decay experiment E791 at Brookhaven National Laboratory. 3 refs., 6 figs., 1 tab. (ERA citation 14:006389)