Stacked Analog-to-Digital Converter for Increased Radar Signal Processor Dynamic Range

摘要

The need for increased dynamic range at the input to the radar digital signal processor has increased steadily over the last decade or so. This has been the result of lower expected radar cross sections, the need for better clutter suppression, and the desire to operate without sensitivity time control (STC) in some radar applications. The analog-to-digital converter (ADC) is the most significant bottleneck in achieving this needed dynamic range performance. In this report, an approach for improving effective dynamic range using multiple ADCs is described. The ADCs are arranged in parallel channels with different gains and the approach is referred to as a 'Stacked Analog-to-Digital Convener', or 'Stacked ADC', in this report. Detailed results are presented for an experimental system assembled to demonstrate and evaluate the concept.