The Effect of Buffering Page Faulted Programs in a Multistream Pipelined Processor.

摘要

As a general rule, a multiple-instruction multiple-data stream pipelined processor is more susceptible to page faults as the number of instruction streams in the system increases when the same primary memory is shared. The size of the primary memory then critically effects the performance of the system. As the number of instruction streams increases, more and more primary memory is generally added to the system to reduce the page fault rate. As a result, the cost of the primary memory becomes a major cost of the system. (Author)