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DMA self-assembled parallel computer architectures

机译:DMA自组装并行计算机体系结构

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摘要

New varieties of computer architectures, capable of solving highly demanding computational problems, are enabled by the large manufacturing scale expected from self-assembling circuit fabrication (10~(12)-10~(19) devices). However, these fabrication processes are in their infancy and even at maturity are expected to incur heavy yield penalties compared to conventional silicon technologies. To retain the advantages of this manufacturing scale, new architectures must efficiently use large collections of very simple circuits. This paper describes two such architectures that are enabled by self-assembly and examines their performance.
机译:自组装电路制造(10〜(12)-10〜(19)器件)有望实现大规模的制造规模,从而实现了能够解决高要求的计算问题的新型计算机体系结构。但是,与常规硅技术相比,这些制造工艺尚处于起步阶段,甚至预期在成熟时也会遭受严重的良率损失。为了保持这种制造规模的优势,新架构必须有效地使用大量非常简单的电路。本文描述了两种通过自组装启用的体系结构,并检查了它们的性能。

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