The main objective of this paper is to evaluate and improve FPGA-based digital circuits, which implement recursive specifications. Using and taking advantage of application-specific circuits in general and FPGA-based accelerators in particular have a long tradition in data processing and for solving problems with high computational complexity. FPGA enables faster, less time consuming hardware implementation and finds a lot of practical applications in various fields of digital design. For example, in [1] an FPGA device was successfully used to accelerate performance of word recognition system compared to its software counterpart.
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