A Lateral Trench Dual Gate Power MOSFET on Thin SOI for Improved Performance

摘要

In this paper, an integrable lateral trench dual gate metal-oxide-semiconductor (LTDGMOS), a power MOSFET on silicon-on-insulator (SOI) is presented. The device consists of two separate trenches built in a thin SOI substrate in which two gates are placed on both sides of the P-body region. The trench dual gate structure not only enhances the drain current due to parallel conduction of two channels but also causes reduced-surface-field effect in the device resulting significant improvement in all performance parameters. The performance of the proposed device is analyzed and compared with that of the conventional lateral MOSFET using 2D numerical simulations. The LTDGMOS provides 2.5 times higher output current, 27% decrease in threshold voltage, 29% reduction in specific ON-resistance (R_(on-sp))> 74% improvement in peak transconductance, 50% increase in breakdown voltage (V_(br)), and 28% reduction in gate-drain charge density (Q_(gd)) as compared to the conventional counterpart for the same cell pitch. The superior V_(br), R_(On-sp), and Q_(gd)of the proposed device yield an improvement of 300% and 50% in the figure-of-merits V_(br)~2/R_(On-sp) and R_(on-Sp) Qgd, respectively over the conventional device.